The smartphones we use, autonomous vehicles on the road, and even AI servers all run on highly advanced semiconductor chips. These chips contain billions of transistors and intricate circuits, far too complex and time-consuming to design by hand.
Electronic Design Automation (EDA) refers to the software tools and technologies that make it possible to design and verify such chips. With EDA, engineers can automatically draw circuits, optimize layouts, and analyze power and performance. This enables the creation of smaller, faster, and more efficient semiconductors, which serve as the foundation for innovations in AI, autonomous driving, healthcare, and many other fields.
Recently, artificial intelligence and machine learning have also been applied to EDA, helping analyze massive design data and discover improved methods for chip design that would be difficult for humans to achieve alone.
Our lab focuses on Electronic Design Automation (EDA) to improve power, performance, and area (PPA) of semiconductor chips by combining heuristic methods with artificial intelligence. Our research covers the full spectrum of chip design, including physical design, analog circuit optimization, standard cell generation, and design-technology co-optimization (DTCO).
We place particular emphasis on applying machine learning (ML) and reinforcement learning (RL) to prediction, optimization, and generation tasks across physical design and design space optimization (DSO).
Our current research is categorized as below (each item links to the corresponding GitHub repository):
